1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device and a method for fabricating the same, which is suitable for reducing a hot carrier effect.
2. Background of the Related Art
In general, short channel device employs an LDD(Lightly Doped Drain) structure for reducing the hot carrier effect. In the LDD, an electric field between a drain and a channel is reduced for reducing electron injection into, collision onto an oxide layer, and ionization and hot carrier effect. Related art structures employed for reducing the hot carrier effect will be explained with reference to the attached drawings. FIG. 1 illustrates a structure provided for reducing the hot carrier effect, wherein an N layer is formed on a drain/source junction to increase a resistance of a drain region for reducing an electric field. However, actual fabrication of the structure by using an existing silicon process is difficult because the structure has a complicated drain/source structure. FIG. 2 illustrates a structure for reducing the hot carrier effect by employing the LDD structure together with a gate fringing effect. The gate fringing effect is an electric field leakage through a periphery of a gate electrode which becomes the greater as a size of an MOSFET device becomes the smaller. If LDD sidewall spacers formed of a material having a high electric permittivity, such as silicon nitride(Si.sub.3 N.sub.4), are provided at both sides of the gate electrode, enhancing the gate fringing effect further, the electric field in the drain region can be reduced. However, because the material with a high electric permittivity, such as silicon nitride employed for using the gate fringing effect, has a band gap substantially smaller than a silicon oxide of a gate oxide film, the hot carrier is liable to be injected to the gate oxide film, that accelerates a device degradation, if the material with a high electric permittivity is used as the sidewall spacers. To prevent this, an additional silicon oxide film is formed between the gate and the sidewall spacer, which leads the fabrication process complicated.
FIG. 3 illustrates a section of an MOSFET with a bent channel. An electric potential barrier is formed at the bent portion of the channel, which decreases an energy of the carrier passing through the barrier and reduces the hot carrier effect. However, this structure also has a problem of a complicated fabrication process due to the structure.